Arrays in VHDL
In VHDL, an array is a collection of elements of the same type. Arrays are commonly used in VHDL for various purposes, including signal and variable declarations.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity ArrayExample is
end ArrayExample;
architecture Behavioral of ArrayExample is
-- Function to convert integer array to string for printing
function int_array_to_string(arr: in integer_vector) return string is
variable result : string(1 to arr'length * 4);
variable idx : integer := 1;
begin
for i in arr'range loop
result(idx to idx+3) := integer'image(arr(i));
idx := idx + 4;
end loop;
return result;
end function;
-- Declare an array of 5 integers
type int_array is array (0 to 4) of integer;
signal a : int_array := (others => 0);
begin
process
-- Declare and initialize an array in one line
variable b : int_array := (1, 2, 3, 4, 5);
-- 2D array declaration
type int_array_2d is array (0 to 1, 0 to 2) of integer;
variable twoD : int_array_2d := ((0, 0, 0), (0, 0, 0));
begin
-- Print the initial array
report "emp: " & int_array_to_string(a);
-- Set a value at an index
a(4) <= 100;
wait for 10 ns; -- Wait for the signal to update
report "set: " & int_array_to_string(a);
report "get: " & integer'image(a(4));
-- Print the length of the array
report "len: " & integer'image(a'length);
-- Print the initialized array
report "dcl: " & int_array_to_string(b);
-- Initialize 2D array
for i in 0 to 1 loop
for j in 0 to 2 loop
twoD(i, j) := i + j;
end loop;
end loop;
-- Print 2D array
report "2d: " & int_array_to_string(twoD(0, 0 to 2)) & " " &
int_array_to_string(twoD(1, 0 to 2));
-- Re-initialize 2D array
twoD := ((1, 2, 3), (1, 2, 3));
report "2d: " & int_array_to_string(twoD(0, 0 to 2)) & " " &
int_array_to_string(twoD(1, 0 to 2));
wait;
end process;
end Behavioral;
In this VHDL example:
We define a custom type
int_array
to create an array of 5 integers.We create a signal
a
of typeint_array
and initialize it with zeros.We define a function
int_array_to_string
to convert our integer arrays to strings for reporting, as VHDL doesn’t have built-in array printing.We demonstrate setting and getting values from the array.
We show how to get the length of an array using the
'length
attribute.We create and initialize an array
b
in one line.We create a 2D array
twoD
and show how to initialize and access it.We use the
report
statement to print our results, which is similar tofmt.Println
in Go.
Note that VHDL is primarily used for hardware description, so concepts like dynamic memory allocation or resizable arrays are not applicable. The arrays in VHDL are fixed-size and determined at compile time.
To simulate this VHDL code, you would typically use a VHDL simulator like ModelSim or GHDL. The output would appear in the simulator’s console, showing the various array operations and their results.