Number Parsing in VHDL

Parsing numbers from strings is a basic but common task in many programs; here’s how to do it in VHDL.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity NumberParsing is
end NumberParsing;

architecture Behavioral of NumberParsing is
    -- Function to convert string to integer
    function str_to_integer(str : string) return integer is
        variable result : integer := 0;
        variable digit : integer;
    begin
        for i in str'range loop
            digit := character'pos(str(i)) - character'pos('0');
            result := result * 10 + digit;
        end if;
        return result;
    end function;

    -- Function to convert string to real
    function str_to_real(str : string) return real is
        variable result : real := 0.0;
        variable fraction : real := 0.1;
        variable decimal_point : boolean := false;
    begin
        for i in str'range loop
            if str(i) = '.' then
                decimal_point := true;
            elsif not decimal_point then
                result := result * 10.0 + real(character'pos(str(i)) - character'pos('0'));
            else
                result := result + real(character'pos(str(i)) - character'pos('0')) * fraction;
                fraction := fraction * 0.1;
            end if;
        end loop;
        return result;
    end function;

begin
    process
        variable f : real;
        variable i : integer;
        variable u : unsigned(63 downto 0);
    begin
        -- Parse float
        f := str_to_real("1.234");
        report "Parsed float: " & real'image(f);

        -- Parse integer
        i := str_to_integer("123");
        report "Parsed integer: " & integer'image(i);

        -- Parse hexadecimal
        i := to_integer(unsigned'("0000000000000000000000000000000000000000000000000000000000011001000"));
        report "Parsed hex: " & integer'image(i);

        -- Parse unsigned integer
        u := to_unsigned(789, 64);
        report "Parsed unsigned: " & integer'image(to_integer(u));

        wait;
    end process;
end Behavioral;

In VHDL, we don’t have built-in functions for parsing numbers from strings like in some high-level languages. Instead, we need to implement our own parsing functions. In this example, we’ve created two functions: str_to_integer for parsing integers and str_to_real for parsing floating-point numbers.

The str_to_integer function iterates through each character in the string, converts it to its numeric value, and builds up the result.

The str_to_real function is similar but also handles the decimal point, allowing for parsing of floating-point numbers.

For hexadecimal parsing, we use VHDL’s built-in ability to create unsigned values from binary strings. We then convert this to an integer.

For unsigned integers, we use the to_unsigned function to create an unsigned value, which we can then convert to an integer if needed.

Note that error handling in VHDL is typically done through assertions or report statements, which are not shown in this example for simplicity. In a real-world application, you would want to add appropriate error checking and handling.

To run this VHDL code, you would typically use a VHDL simulator such as ModelSim or GHDL. The process of compiling and running VHDL code depends on your specific toolchain and simulation environment.

-- Simulation output might look like this:
# Parsed float: 1.234000
# Parsed integer: 123
# Parsed hex: 456
# Parsed unsigned: 789

This example demonstrates basic number parsing in VHDL. However, it’s important to note that VHDL is primarily used for hardware description and synthesis, where such string parsing operations are less common. In real VHDL applications, you’re more likely to work with predefined numeric types and perform arithmetic operations directly on those types.

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